1.5 ghz low noise silicon mmic amplifier technical data ina-52063 features ? ultra-miniature package ? single 5 v supply (30 ma) ? 22 db gain ? 8 dbm p 1db ? unconditionally stable applications ? amplifier for cellular, cordless, special mobile radio, pcs, ism, wireless lan, dbs, tvro, and tv tuner applications description agilents ina-52063 is a silicon monolithic amplifier that offers excellent gain and power output for applications to 1.5 ghz. packaged in an ultraminiature sot-363 package, it requires half the board space of a sot-143 package. the ina-52063 is fabricated using agilents 30 ghz f max isosat tm silicon bipolar process which uses nitride self-alignment sub- micrometer lithography, trench isolation, ion implantation, gold metallization, and polyimide intermetal dielectric and scratch protection to achieve superior performance, uniformity, and reliability. surface mount sot-363 (sc-70) package pin connections and package marking note: package marking provides orientation and identification. equivalent circuit (simplified) output and v cc gnd 3 52 gnd gnd input 2 1 3 6 5 4v cc rf input rf output & v cc ground 3 v cc ground 2 ground 1
2 absolute maximum ratings absolute symbol parameter units maximum [1] v cc supply voltage, to ground v 12 p in cw rf input power dbm +13 t j junction temperature c 150 t stg storage temperature c -65 to 150 thermal resistance [2] : q j-c = 170 c/w notes: 1. operation of this device above any one of these limits may cause permanent damage. 2. t c = 25 c (t c is defined to be the temperature at the package pins where contact is made to the circuit board) ina-52063 electrical specifications, t c = 25 c, z o = 50 w , v cc = 5 v, unless noted symbol parameters and test conditions units min. typ. max. g p power gain (|s 21 | 2 ) f = 900 mhz db 20 22 nf noise figure f = 900 mhz db 4.0 p 1db output power at 1 db gain compression f = 900 mhz dbm +8 ip 3 third order intercept point f = 900 mhz dbm +20 ip 3 third order intercept point f = 2100 mhz dbm +15 vswr input vswr f = 900 mhz 1.4 output vswr f = 900 mhz 1.3 i cc device current ma 30 38 i d group delay f = 900 mhz ps 238
3 figure 8. supply current vs. voltage and temperature. ina-52063 typical performance, t c = 25 c, z o = 50 w , v cc = 5 v, unless noted figure 5. noise figure vs. frequency and temperature. figure 6. output power for 1 db gain compression vs. frequency and temperature. figure 4. gain vs. frequency and temperature. figure 3. output power for 1 db gain compression vs. frequency and voltage. figure 2. noise figure vs. frequency and voltage. figure 1. gain vs. frequency and voltage. figure 7. input and output vswr vs. frequency. gain (db) 0.05 15.0 frequency (ghz) 24.0 16.0 2.45 18.0 0.65 17.0 1.25 1.85 19.0 20.0 22.0 23.0 5.5 v 5.0 v 4.5 v 21.0 noise figure (db) 0.2 3.5 frequency (ghz) 6.0 4.5 0.5 1.1 1.7 5.0 5.5 5.5 v 5.0 v 4.5 v 4.0 2.3 0.8 1.4 2.0 0.09 2.6 p1db (dbm) 2.0 frequency (ghz) 12.0 6.0 0.30 8.0 10.0 5.5 v 5.0 v 4.5 v 4.0 2.40 0.60 1.20 1.80 11.0 9.0 7.0 5.0 3.0 0.05 gain (db) 0.05 15.0 frequency (ghz) 24.0 16.0 2.40 18.0 0.60 17.0 1.20 1.80 19.0 20.0 22.0 23.0 -40 ? +25 ? +85 ? 21.0 noise figure (db) 0.05 3.0 frequency (ghz) 0.80 7.0 3.5 2.40 4.5 1.20 0.40 4.0 1.60 2.00 5.0 5.5 6.0 6.5 -40 ? +25 ? +85 ? p1db (dbm) 0.05 4 frequency (ghz) 0.60 12 5 2.40 7 0.30 6 1.20 1.80 8 9 10 11 -40 ? +25 ? +85 ? vswr (db) 0.0 5 1.0 frequency (ghz) 2.2 1.4 0.4 0 1.1 0 1.8 0 1.6 2.0 vswr in vswr out 1.2 2.5 0 0.7 5 1.4 5 2.1 5 1.8 i cc (ma) 0.0 0 v cc (v) 60 20 1.0 3.0 5.0 30 50 10 7.0 2.0 4.0 6.0 40 -40 ? +25 ? +85 ?
4 ina-52063 typical scattering parameters [3] , t c = 25 c, z o = 50 w , v cc = 5.0 v freq. s 11 s 21 s 12 s 22 k ghz mag ang db mag ang db mag ang mag ang factor 0.05 0.06 165 23.5 14.88 -5 -29.3 0.034 0 0.05 1 1.24 0.10 0.06 154 23.4 14.84 -9 -29.3 0.034 0 0.05 0 1.24 0.20 0.06 131 23.4 14.72 -19 -29.4 0.034 0 0.05 -1 1.25 0.30 0.07 104 23.3 14.57 -28 -29.5 0.034 1 0.06 -5 1.25 0.40 0.07 80 23.1 14.33 -37 -29.4 0.034 2 0.07 -10 1.26 0.50 0.09 66 23.0 14.08 -46 -29.4 0.034 3 0.08 -14 1.27 0.60 0.10 46 22.8 13.76 -55 -29.4 0.034 4 0.09 -21 1.28 0.70 0.12 30 22.6 13.41 -64 -29.3 0.034 5 0.11 -29 1.29 0.80 0.13 14 22.3 13.01 -73 -29.2 0.035 6 0.13 -37 1.28 0.90 0.15 0 22.0 12.59 -82 -29.0 0.036 6 0.14 -45 1.27 1.00 0.17 -12 21.7 12.14 -90 -28.8 0.036 7 0.16 -52 1.28 1.20 0.21 -33 21.0 11.22 -106 -28.4 0.038 7 0.20 -67 1.25 1.40 0.24 -50 20.2 10.28 -122 -28.1 0.040 6 0.23 -81 1.24 1.60 0.27 -66 19.4 9.38 -137 -27.7 0.041 4 0.25 -94 1.26 1.80 0.30 -80 18.6 8.55 -151 -27.5 0.042 2 0.27 -107 1.29 2.00 0.32 -93 17.8 7.80 -164 -27.4 0.043 -1 0.29 -118 1.33 2.20 0.33 -105 17.1 7.13 -177 -27.6 0.042 -5 0.30 -129 1.44 2.40 0.35 -117 16.3 6.52 170 -27.8 0.041 -8 0.31 -139 1.56 2.60 0.36 -128 15.5 5.98 159 -28.1 0.039 -12 0.32 -149 1.74 2.80 0.36 -139 14.8 5.52 147 -28.9 0.036 -15 0.33 -158 2.01 3.00 0.36 -149 14.1 5.08 136 -29.5 0.033 -16 0.33 -168 2.37 note: 3. reference plane per figure 9 in applications information section. ina-52063 applications information introduction the ina-52063 is a silicon rfic amplifier that is designed with an internal resistive feedback net- work to provide a 50 w input and 50 w output impedance. with a third order intercept point of +20 dbm and a low noise figure of 4 db, the ina-52063 is especially useful for rf and if amplifier applications requiring high dynamic ranges. phase reference planes the positions of the reference planes used to measure s-parameters for this device are shown in figure 9. as seen in the illustration, the reference planes are located at the point where the package leads contact the test circuit. sot-363 pcb layout the ina-52063 is packaged in the miniature sot-363 (sc-70) surface mount package. a pcb pad layout for the sot-363 package is shown in figure 10 (dimensions are in inches). this layout provides ample allowance for package placement by automated assembly equipment without adding pad parasitics that could impair the high frequency performance of the ina-52063. the layout is shown with a nominal sot-363 package footprint superimposed on the pcb pads for reference. figure 9. phase reference planes. figure 10. pcb pad layout (dimensions in inches). 0.026 0.07 0.016 0.035 reference planes test circuit
5 operating details the ina-52063 is a voltage biased device that operates from a +5 volt power supply with a typical current drain of 30 ma. all bias regulation circuitry is integrated into the rfic. figure 11 shows a typical imple- mentation of the ina-52063. the supply voltage for the ina-52063 must be applied to two terminals, the v cc pin and the rf output pin. the v cc connection to the ampli- fier is rf bypassed by placing a capacitor to ground near the v cc pin of the amplifier package. the power supply connection to the rf output pin is achieved by means of a rf choke (inductor). the value of the rf choke must be large relative to 50 w in order to prevent loading of the rf output. the supply voltage end of the rf choke is bypassed to ground with a capacitor. if the physical layout permits, this can be the same bypass capacitor that is used at the v cc terminal of the amplifier. blocking capacitors are normally placed in series with the rf input and the rf output to isolate the dc voltages on these pins from circuits adjacent to the amplifier. the values for the blocking and bypass capacitors are selected to provide a reactance at the lowest frequency of operation that is small relative to 50 w . rf layout an example layout for an amplifier using the ina-52063 is shown in figure 12. this example uses a microstrip- line design (solid groundplane on the back side of the circuit board). the circuit board material is 0.031-inch thick fr-4. plated through holes (vias) are used to bring the ground to the top side of the circuit where needed. multiple vias are used to reduce the inductance of the path to ground. figure 13 shows an assembled amplifier. the +5 volt supply is fed directly into the v cc pin of the ina-52063 and into the rf output pin through the rf choke (rfc). capacitor c3 provides rf bypassing for both the v cc pin and the power supply end of the rfc. capacitor c4 is optional and may be used to add additional bypass- ing for the v cc line. a well bypassed v cc line is especially necessary in cascades of ampli- fier stages to prevent oscillation that may occur as a result of rf feedback through the power supply lines. for this demonstration circuit, the value chosen for the rf choke was 220 nh (coilcraft 1008cs-221 or equivalent). all of the blocking and bypass capac- itors are 1000 pf. these values provide excellent amplifier performance from under 50 mhz through 1 ghz. larger values for the choke and capacitors can be used to extend the lower end of the bandwidth. since the gain of the ina-52063 extends down to dc, the frequency response of the amplifier is limited only by the values of the capacitors and choke. a convenient method for making rf connection to the demonstra- tion board is to use a pcb mounting type of sma connector (johanson 142-0701-881, or equivalent). these connectors can be slipped over the edge of the pcb and the center conduc- tors soldered to the input and output lines. the ground pins of the connectors are soldered to the ground plane on the backside of the board. the extra ground pins for the top of the board are not needed and are clipped off. pcb materials typical choices for pcb material for low cost wireless applications are fr-4 or g-10 with a thickness of 0.025 or 0.031 inches. a thick- ness of 0.062 inches is the maxi- mum that is recommended for use with this particular device. the use of a thicker board mate- rial increases the inductance of the plated through vias used for rf grounding and may deterior- ate circuit performance. adequate grounding is needed not only to obtain maximum amplifier performance but also to reduce any possibility of instability. figure 11. basic amplifier application. figure 12. rf layout. input output v cc ina-5xx63 demo board 05/95 rf output rf input v cc c bypass c block c block 52 rfc
6 figure 13. assembled amplifier. input output c2 rfc c1 c3 c4 v cc ina-5xx63 demo board 05/95 52 ina-52063 part number ordering information part number devices per container container INA-52063-TR1 3,000 7" reel ina-52063-blk 100 antistatic bag package dimensions outline 63 (sot-363/sc-70) 2.20 (0.087) 2.00 (0.079) 1.35 (0.053) 1.15 (0.045) 1.30 (0.051) ref. 0.650 bsc (0.025) 2.20 (0.087) 1.80 (0.071) 0.10 (0.004) 0.00 (0.00) 0.25 (0.010) 0.15 (0.006) 1.00 (0.039) 0.80 (0.031) 0.20 (0.008) 0.10 (0.004) 0.30 (0.012) 0.10 (0.004) 0.30 ref. 10 0.425 (0.017) typ. dimensions are in millimeters (inches)
7 tape dimensions and product orientation for outline 63 device orientation user feed direction cover tape carrier tape reel end view 8 mm 4 mm top view 52 52 52 52 p p 0 p 2 f w c d 1 d e a 0 8 max. t 1 (carrier tape thickness) t t (cover tape thickness) 5 max. b 0 k 0 description symbol size (mm) size (inches) length width depth pitch bottom hole diameter a 0 b 0 k 0 p d 1 2.24 0.10 2.34 0.10 1.22 0.10 4.00 0.10 1.00 + 0.25 0.088 0.004 0.092 0.004 0.048 0.004 0.157 0.004 0.039 + 0.010 cavity diameter pitch position d p 0 e 1.55 0.05 4.00 0.10 1.75 0.10 0.061 0.002 0.157 0.004 0.069 0.004 perforation width thickness w t 1 8.00 0.30 0.255 0.013 0.315 0.012 0.010 0.0005 carrier tape cavity to perforation (width direction) cavity to perforation (length direction) f p 2 3.50 0.05 2.00 0.05 0.138 0.002 0.079 0.002 distance width tape thickness c t t 5.4 0.10 0.062 0.001 0.205 0.004 0.0025 0.00004 cover tape
www.semiconductor.agilent.com data subject to change. copyright ? 1999 agilent technologies obsoletes 5964-2253e 5965-9681e (11/99)
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